1)BCH codeBCH码
1.Method of extending error-correcting capability of some BCH codes;一种扩展部分BCH码纠错能力的方法
2.Some properties of one of the classifed binary BCH code;一类二元BCH码的若干性质
3.Construction of BCH code over Z_p~k;Z_p~k环上的BCH码的构造
英文短句/例句
1.The New Exact Value of (k,r)-arcs and Acceleration of the Decoding Procedure of BCH Code;（k，r）-arcs新精确值和BCH码解码的加速
2.The Optimization and Application of Decoding Algorithm of Binary BCH Code;二元BCH码译码算法的优化与应用
3.A Coding and Decoding Algorithm and its implementation of shortened BCH Codes(16,8,5)缩短BCH码(16,8,5)编译码算法及其实现
4.The Implementation of BCH Hardware Decoder on BM Algorithm基于BM算法的BCH码的译码硬件实现
5.A Study on BCH Codes Based on the Group Change in the VWDK System基于群变换的BCH码在VWDK系统中的研究
6.The change bit one-by-one decode method for BCH and its application in GPON systemBCH码逐位取反译码方法及其在GPON系统中的应用
7.Research and FPGA Implementation of BCH Encoder and Decoder in Digital Television Broadcasting System;数字电视传输系统中BCH码编/译码器的研究与FPGA实现
8.One Method to Solve the BCH Code Error-locator Equation Suitable for Implementation in Semiconductor Memories一种适于半导体存储器的BCH码错误定位方程求解方法
9.Bose-Chaudhuri-HocQuenghem code错误纠正码，bch 码
10.Realization of the Encoder of BCH(23,12) Code Based on FPGA;基于FPGA的BCH(23,12)码编译码器的实现
11.Parametric Design of BCH/RS Coder/Decoder;参数化的BCH/RS编解码器设计
12.Design and Implementation of Configurable Parallet BCH Decoder可配置并行BCH译码器的设计与实现
13.High-Speed Parallel BCH Decoder Circuit in VLSI高速并行BCH译码器的VLSI设计
14.An area-efficient parallel BCH decoder supporting foresighted error search一种支持预搜索的面积紧凑型BCH并行译码电路
15.SLC/MLC NAND FLASH Controller VLSI Design with BCH Encoder and Decoder一种含BCH编解码器的SLC/MLC NAND FLASH控制器的VLSI设计
16.Audio Watermarking Method Based on BCH Error Correcting Coding基于BCH纠错编码技术的小波域音频数字水印研究
17.Fuzzy BCH-algebras and Ω-fuzzy BCH-algebras;模糊BCH-代数与Ω-模糊BCH-代数(英文)
18.Quasi-associativeΩ-fuzzy ideals of BCH-algebras;BCH-代数的拟结合Ω-模糊理想(英文)
相关短句/例句
BCH codesBCH码
1.Software implement on a kind of encoder-decoder of BCH codes;一种BCH码编译码器的软件实现
2.Burst error correcting performance analysis of BCH codesinterleaving in wireless burst channels;无线突发信道中抗突发错误BCH码交织编码的性能分析
3.Realization of decoding binary BCH codes based on Peterson algorithm;基于Peterson算法的BCH码软件解码的实现
3)BCHBCH码
1.Software Implementation of Coding and Decoding for BCH Codes in DVB-S2;DVB-S2中BCH码软件编译码实现
2.Implementation of a New BCH Decoding Algorithm in TPS;一种BCH码的新型译码方法在TPS信息提取中的应用
3.According to investigating the error-correcting codes in wireless channel,this paper puts forward a simple BCH encoding and decoding method by using VHDL language and QuartusⅡ development software,and the BCH(31,21,2) encoding and decoding based on FPGA(Field Programmable Gate Array) is realized.文章通过对无线信道中纠错编码的研究,提出一种BCH码的简单编译码设计思想和方法,应用Altera公司开发的硬件描述语言VHDL及开发系统软件QuartusⅡ,实现了基于FPGA(现场可编程门阵列)的BCH(31,21,2)码编、译码全数字过程,并给出了仿真波形,证实了此种编译码器的可实现性。
4)(63,51)BCH code(63,51)BCH码
5)quantum BCH codes量子BCH码
6)BCH coding and decodingBCH编译码
1.In order to improve the reliability of the communication,the bit error rate is reduced by a scheme of BCH coding and decoding combined with interleaving.在分析了一般BCH编译码原理的基础上,提出了一种适合于ARM软件实现的快速编译码设计方案。
延伸阅读
BCH 码 见分组码。
