减法器,subtracter英语短句,例句大全

减法器,subtracter
1)subtracter[s?b'tr?kt?]减法器

英文短句/例句

1.The realization of the fast adder-subtracter for the 23 bit’s floating point numbers by VHDL用VHDL实现的23位快速浮点数加减法器
2.Brief Discussion on Application of Enthalpy Balance Method in Desuperheater Water Calculation浅谈热焓平衡法在减温器投加减温水量的应用
3.Measures intended to decelerate the arms buildup.意为减慢武器装备更新速度的方法
4.adding and subtracting device, pocket-type, operated with a stylus加减法运算器，袖珍型，靠记录针控制
5.Research on Performance and Testing Methods of Automotive Final Drive;汽车主减速器性能及其检测方法研究
6.A Study on a New Testing Method for Automotive Shock Absorber;汽车减振器不解体测试试验方法研究
7.Gear Reducer Optimal Design Based on Genetic Algorithm基于遗传算法的齿轮减速器优化设计
8.A Multi-Point Parallel Optimization Method for Reducer Design基于多点并行优化方法的减速器设计
9.Research on design method of reducer based on the TBS model基于TBS模型的减速器设计方法的研究
10.Based on the assembly sequence reducer planning study基于减速器的装配序列规划方法研究
11.An Accelerated Method of Circular Subtraction Division一种基于循环减法原理除法器的加速方法
12.attenuation compensator衰减均衡器衰减补偿器
13.Adopted booth arithmetic to design multiplication module.在除法器的设计中采用了移位相减的方法;
14.attenuator: a device that attenuates an electrical signal.衰减器,减压器: 使电子讯号减弱的装置。
15.A device that attenuates an electrical signal.衰减器，减压器使电子讯号减弱的装置
16.cylinder relief cock汽缸减压旋塞，减压器
17.Acoustics--Measurement of sound attenuation of hearing protectors--Subjective methodGB/T7584-1987声学护耳器声衰减的测量主观法
18.Method and Suggestion of Rising Control Accuracy for Hump Clasp Retarder提高驼峰减速器控制精度的方法及建议

相关短句/例句

Subtractor[s?d'tr?kt?]减法器
1.Study on High Impedance Subtractor with High CMR;高阻抗高共模抑制减法器研究
2.In this paper,we present a fast square root based on FPGAs,it is high-throughput pipelined implementation which uses multiple adder/subtractors.一般的平方根算法,使用一定量的迭代运算,由传统的加法器和减法器构成,资源占用少,但速度较慢。
3.Essentially,the subtractor feeds the supply noise directly into the feedback loop of the bandgap circuit which could help to suppress supply noise.该电路的基本结构是将一个简单的电压减法器集成到传统的Brokaw基准中构成改进电路。
3)subtractor[s?d'tr?kt?]减法器;减数
4)adder subtracter加减法器
1.Based on the study of Clocked Transmission Gate Adiabatic Logic(CTGAL) and adder,a new design scheme of adiabatic parallel prefix adder subtracter is proposed.通过对钟控传输门绝热逻辑(Clocked Transmission Gate Adiabatic Logic,CTGAL)电路和加法器电路的研究,提出了一种基于CTGAL电路的绝热并行前缀加减法器设计方案。
5)full subtractor全减法器
6)HS (half subtracter)半减法器