1)hardware description language硬件描述语言
1.Digital clock design based on the hardware description language(VHDL);基于硬件描述语言(VHDL)的数字时钟设计
2.All the functions were programmed with the hardware description language VHDL, key code of the program,and were dow nloaded into the object chid XC3S500E,Spartan3E Series,Xilinx.对各个模块功能加以说明,通过硬件描述语言VHDL编程实现,并给出部分主要程序代码,Spartan3E系列的XC3S500E目标芯片上通过调试。
3.The digital part of LCD controller was modeled by Verilog hardware description language.根据“自顶向下”的设计思想 ,将系统进行层次化功能划分 ,并用Verilog硬件描述语言对各模块进行了RTL实现 。
英文短句/例句
1.CHDL (Computer Hardware Description Language)计算机硬件描述语言
2.nonprocedural computer hardware description language非过程计算机硬件描述语言
3.An Exploration on the Teaching Reformation of the HDL Course;“硬件描述语言”课程的教学改革探索
4.The Status Quo and Development of Several Hardware Description Languages;几种硬件描述语言HDL的现状与发展
5.To design waveform pulsing with VHDL Hardware DescriPtion Language;用VHDL硬件描述语言设计波形发生器
6.The Research and Development of the Network Courseware for "Verilog HDL Hardware Description Language";《Verilog HDL硬件描述语言》网络课件研究与开发
7.Programmable logic devices and EDA way for hardware description language;可编程逻辑器件及硬件描述语言的EDA方法
8.The application of hardware description language VHSIC in design of ASIC硬件描述语言在专用集成电路设计中的应用
9.On the Synthetically VHDL Hardware Description Language Under the Max+PlusⅡ Software;基于Max+PlusⅡ平台对VHDL硬件描述语言综合的探讨
10.A Programmable UART Based on Verilog HDL基于Verilog硬件描述语言的可编程异步收发器
11.Advanced Boolean Expression Language is a big breakthrough in the development of the electronics system.硬件描述语言是当代电子系统发展的一个重大突破。
12.Research and Implementation of Parallel Logic Simulation System Based on VHDL;基于硬件描述语言的并行逻辑模拟系统研究与实现
13.The Investigation of the Combinatory Logic Circuit Design Based on the ABEL-HDL;基于硬件描述语言ABEL-HDL实现组合逻辑电路的探讨
14.Resource Models and Hardware Synthesis for System Level Design Language;资源模型与系统级描述语言的硬件综合
15.Describing basic logic openration in the digital circuit with hard description数字电路基本逻辑运算的硬件语言描述与应用
16.Construction of"Language to Describe"the Teaching of Computer Hardware Platform构建“类描述语言”的计算机硬件教学平台
17.A Survey of Software Architecture Description Language ADL;软件构架描述语言ADL的研究进展
18.Design and realization of new software requirements description language一种软件需求描述语言的设计与实现
相关短句/例句
VHDL硬件描述语言
1.Apply VHDL to Digital System Design;硬件描述语言在数字系统设计中的应用
2.Function of UART Realized in Programmable Device by VHDL;用硬件描述语言在可编程器件中实现UART功能
3.VHDL and Digital Ccircuit Ddesign硬件描述语言与数字电路设计
3)HDL硬件描述语言
1.Implementation of Viterbi Decoding With Verilog HDL;用Verilog硬件描述语言实现Viterbi译码
2.Building of HDL MP3 Decoder′s Test Bench and IP Core Reuse;基于硬件描述语言的MP3解码器仿真平台的搭建以及IP Core的重用
3.Designing Digital-Calculagraph By Verilog HDL;用Verilog硬件描述语言设计数字计时器
4)Verilog HDL硬件描述语言
1.Additionally the paper details programming method of using Verilog HDL.对该模块的Verilog硬件描述语言编程方法也进行了详细说明。
2.This paper analyzed the principle of CRC, studied a parallel CRC algorithm and implemented it by Verilog HDL.通过对CRC校验码原理的分析,研究了一种并行CRC算法并采用硬件描述语言Verilog HDL来实现。
5)Hardware Describe Language硬件描述语言
1.the implementation of the interruption operation mode is introduced in the Hardware Describe Language design of the Programmable Logic Device and make the signal relativity of adjacent modules more simplicial, and make the Design get more Flexible .中断概念主要应用于微处理器的实时系统软件设计中,在可编程逻辑器件的硬件描述语言设计中,引入微处理器系统中的中断操作模式,简化前后级模块的信号关联,使可编程逻辑器件开发更加灵活。
6)VHDL硬件描述语言(VHDL)
延伸阅读
图像描述语言 用于描述图像的一种形式语言。这种语言的句子用表示基元（见模式文法）的终止符、连接算符和括号组成的链表示，它是1969年由C.肖建立的。首先在每个基元上选定两个不同的点，分别标记为头(h)和尾(t)，然后规定一个一元算符～和一组二元算符{+,-,×,*}，使基元或子模式可在头、尾处连接起来。这些算符的意义如图1。～a是将a的头尾颠倒;a+b是将b的尾与a的头连接；a-b是将b的头与a的头连接;a×b是将b的尾与a的尾连接；a*b是将b的头和尾分别与 a的头和尾连接。四种连接运算所得结果的头和尾都分别是b的头和a的尾。例如,图2上方ɑ，b，c，d表示基元，那么，其下方的图像可以由(b+(b-c)+c+d+(d×(～b))+(～b))*(a+(b+a+(～b))*a+a)描述。设VT＝｛b|b为基元｝∪{+,-,×,*,～,(,)}，则以VT为终止符集的适当的短语结构文法，能够生成图像描述语言。例如，上下文无关文法G＝({S，A，B},{ɑ，b,+,×,(,)},P，S),其中P＝{S─→B+(B+A)×(A),A─→a+A，A─→ɑ，B─→b+B，B─→b},可以用来对各种尺寸的字符进行描述。图像描述语言可以用链表示某些二维图像，所以在句法模式识别中得到较多的应用。 参考书目 K.S.Fu，Syntactic Pattern Recognition and Applications，Prentice-Hall，Englewood Cliffs, N.J.,1982.
